Design Verification Engineer

Would you like to join Apple's growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.

Description

As a Design Verification Engineer, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly. You will play a key role in designing and implementing C tests for the wireless SoCs verification and power analysis.","responsibilities":"Work closely with architecture and RTL power designers on defining power vector tests and verifying functionality correctness of the Wireless SoC design

Develop test plan and test environments in C or UVM

Develop complex power vector tests for wireless protocol designs in C or assembly

Preparing and executing the test plan and performing reviews with the cross functional teams

Collaborating cross functionally with Design, Architecture, Power, Silicon Validation, Performance and SW Teams

Preferred Qualifications

MSEE preferred

Knowledge of industry standard interfaces

Understanding of ARM V7 or V8 architecture is plus

Experience in setting UVM/System TB with embedded C tests

Good understanding of CPU architecture and instruction sets

Experience in System level tests with Python or other Scripting language is plus

Excellent analytical and debug skills

Experience in UVM DV

Experience with porting simulation tests to emulation is a plus

Knowledge of wireless protocols is a plus

Should be a great teammate with excellent communication skills and be able to work independently on the verification efforts

Minimum Qualifications

BS and a minimum of 10 years relevant industry experience

Experience with C/C++/assembly programming and Verilog/SystemVerilog

Understand C compilation flow and makefile

Solid verification skills in problem solving, constrained random testing, and debugging

Solid understanding of reusable verification framework

Knowledge of digital logic design, chip architecture, and microarchitecture

Develop complex tests or power vectors in assembly, or C according to test plans

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,000 and $308,500, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.