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Apple

Gate-level SigEM/SEB/FIT CAD Engineer

Austin Metro Area, TX$184,700 – $324,800Posted 22 days ago

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Why you should apply for a job to Apple:

Ranked as one of the Best Technology Companies in 2020
3.7/5 in overall job satisfaction
3.1/5 in supportive management
66% say women are treated fairly and equally to men
65% would recommend this company to other women
66% say the CEO supports gender diversity

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Imagine what you could do here! At Apple, new ideas have a way of becoming phenomenal products very quickly. Do you want to bring passion and dedication to your job? There's no telling what you could accomplish at Apple. The people who work here have reinvented entire industries with Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices - we continue to strengthen our commitment to leave the world better than we found it!

As a key member of our best-in-class CAD Group, you will be part of building innovative designs. We will apply your hands-on experience in electromigration (EM), static error band (SEB), failure in time (FIT), self-heating effect (SHE), and thermal analysis to develop, define, and refine the methodologies and flows for gate-level as well as transistor-level designs. Major tasks will include IP / SOC signal EM analysis for clock and data nets, SOC FIT budget validation, power-grid EM verification, 3DIC and interposer thermal integrity, power switch and standard cell EM/SHE characterization, design abstract and reuse, sign-off, and ECO, and much more. Are you ready to join some of the world's leading engineers, and help us deliver the next generation of ground-breaking Apple products?

Description

In this highly visible role, your primary responsibilities will include:
• Define and architect comprehensive EM/SEB/thermal methodologies and drive deployment across multiple advanced node designs with minimal oversight
• Lead development of customized EM/SEB/thermal solutions which scale with accuracy and capacity challenges, establishing best practices and design guidelines
• Own and drive the entire EM/SEB/thermal flow from concept through sign-off, including automation, quality metrics, and continuous improvement
• Serve as the technical authority and primary point of contact for various teams (Physical design and Integration, Clock and Signal integrity, Circuit design, Power, Package, System, Technology) on EM/FIT requirements and trade-offs
• Independently develop, validate, and maintain EM/thermal rule decks and verification methodologies for clock trees, high-speed data paths, and critical signal nets across multiple projects
• Drive technical engagement with EDA vendors and foundries for tool qualification, model development, enhancement requests, and roadmap alignment
• Establish and lead correlation studies between EM analysis tools and silicon failure analysis data, driving methodology improvements based on findings
• Mentor entry level engineers on EM/SEB/thermal analysis techniques and best practices

Preferred Qualifications

Proficiency in at least one of Tcl, Python, and/or Perl scripting languages

Experience in at least one of the analysis involved in EM - extraction, timing, simulation, EM modeling, physical design, and physical verification

Hands-on knowledge of industry leading EMIR tools e.g. Voltus, Voltus-Fi, RedHawk-SC, Totem

Hands-on experience with analysis, optimization, and debugging of IR/IVD/EM issues on high performance, large-scale designs and silicon

Familiarity with advanced packaging technologies (2.5D/3D/3.5DIC) and their unique EM challenges

Expertise in AI/ML-driven innovation for CAD workflows

Experience in development of large-scale software in multi-user, multi-site environments

Ability to coordinate and drive initiatives with little to no oversight

Excellent communication and presentation skills

Minimum Qualifications

Experience with EM/SEB/FIT/SHE/Thermal methodologies and calculations

Experience with current density calculations, heating effects, and electromigration failure mechanisms

Experience in EDA tools and CAD flow development

Minimum of BS + 10 years of relevant industry experience

Pay & Benefits

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

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At Apple, we believe accessibility is a fundamental human right. You'll find that idea reflected in everything here - in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Learn about accessibility in Apple's workplace

Learn about reasonable accommodations for job applicants

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Apple accepts applications to this posting on an ongoing basis.

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Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

About Apple

Working at Apple means doing more than you ever thought possible and having more impact than you ever imagined.

Size: 10,000+ employees
Industry: Technology: Manufacturing

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