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Cadence Design Systems

Lead Software Engineer - Logic Synthesis

Shanghai, ChinaPosted Sep 16, 2026

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Why you should apply for a job to Cadence Design Systems:

Ranked as one of the Best Technology Companies in 2024
4.4/5 in overall job satisfaction
4.4/5 in supportive management
87% say women are treated fairly and equally to men
89% would recommend this company to other women
87% say the CEO supports gender diversity

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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Position Description:

Responsible for development and maintenance of the synthesizer for Palladium.
Implementation for new VHDL/Verilog feature support in synthesizer.
Logic optimization and performance improvement in synthesizer.

Position Requirement:

This position requires a Bachelor or Master's degree in EE/CS/CE with 3-5 years of industry experience.
Candidate should be proficient with C/C++, Operating system concepts.
Design modeling using Verilog/SV, VHDL or SysC.
Knowledge and experience in RTL modeling of BFMs along with exposure to verification methodologies using UVM and SC/TLM is preferable.
EDA/CAD tool development experience or logic design verification experience is highly preferred.
Knowledge and experience in AI tools like Copilot or Claude code is preferred.
Requires good communication skills, attention to details, and ability to work in multi-site/multi-person project.

We're doing work that matters. Help us solve what others can't.

About Cadence Design Systems

Cadence is a pivotal leader in computational software.

Size: 10,000+ employees
Industry: Technology: Manufacturing

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