45 jobs for "PHY RTL Design Engineer"

DDR Design Engineer

At Apple - Waltham

Posted on Oct 7

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At Cadence Design Systems - Bangalore

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WSoC PHY/MAC Validation and Integration Engineer

At Apple - San Francisco Bay Area

Posted on Oct 5

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Lead Design Engineer

At Cadence Design Systems - Bangalore

Posted on Dec 3

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Principal Design Engineer

At Cadence Design Systems - Bangalore

Posted on Oct 9

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Apple

DDR Design Engineer

Waltham, MA$165,800 – $292,400Posted Oct 7, 2026

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At Apple, we work every day to craft products that enrich people's lives. If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated DDR Design Engineer.

As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple's customers every single day. You will join the DDR PHY design team. We provide best-in-class PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design, from concept study, architecture definition, design and verification, to silicon bring-up and characterization.

Description

In this role, you will be responsible for performing concept studies and providing direction in terms of performance, gate count and power for various digital designs. You will be responsible for writing detailed design specification and test plans in close collaboration with architecture, circuit designers and verification engineers. You will provide high-quality RTL description, including assertions, for the design. Use formal tools and static checkers to guarantee RTL quality. You will also support design verification to insure bug-free first silicon. Responsibilities will include driving functional and code coverage as well as timing closure for your designs and supporting silicon bring-up, performance and power characterization.

Preferred Qualifications

RTL design using Verilog or SystemVerilog, assertion writing.

Design of state machines, data paths, arbitration and clock domain crossing logic.

Logic synthesis, timing constraints.

Exposure to Design For Test, understanding of scan concept and writing DFT friendly RTL.

Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking.

Prior experience in DDR PHY design and mixed-signal environment is a plus.

Minimum Qualifications

BS degree in technical discipline with minimum 10 years of relevant experience

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $165,800 and $292,400, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

About Apple

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Size: 10,000+ employees
Industry: Technology: Manufacturing

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