RFIC Layout Engineer
19 days ago Irvine, CA
About us
Working at Apple means doing more than you ever thought possible and having more impact than you ever imagined.
- Size: 10,000+ employees
- Industry: Technology: Manufacturing
Why you should apply for a job to Apple:
Ranked as one of the Best Technology Companies in 2020
3.7/5 in overall job satisfaction
3.1/5 in supportive management
66% say women are treated fairly and equally to men
65% would recommend this company to other women
66% say the CEO supports gender diversity
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Do you have a passion for invention and self-challenge? Do you thrive with pushing the limits of what's considered feasible? As part of an outstanding `team, you'll craft sophisticated, groundbreaking projects that deliver more performance in our products than ever before. You'll work across fields to transform improved hardware elements into a single, coordinated design. Join us, and you'll help us innovate new technologies that continually outperform the previous iterations! By collaborating with other product development groups across Apple, you'll push the industry boundaries of what wireless systems can do and improve the product experience for our customers worldwide.
Description
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation and FW/SW engineering.
- Block level and top-level layout through full verification flow, including extraction, DRC, LVS, and DFM checking.
- Co-work with designers on block-level and top-level floorplanning.
- Layout review for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling.
- Top-level layout integration and verification, schedule management.","responsibilities":"As a RF layout engineer, you will be responsible for:
Detailed transistor-level layout of RF and analog circuit blocks, including LNA, mixers, PLL, LO generation, modulators, power amplifiers, ADC/DAC, baseband filters, and bandgap/bias/LDO.
Preferred Qualifications
Knowledgeable in layout techniques for device matching, minimizing parasitics, RF shielding, and high-frequency routing.
Experience in custom RF/analog layout for radio transceivers with extensive knowledge of deep sub-micron CMOS (16nm and lower with FinFet experience).
Solid understanding of RC delay, electromigration, and coupling.
Understanding of guard rings, DNW, PN junctions, and sophisticated process effects such as LOD, WPE, etc.
High level proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. in FinFet Technology.
Extensive knowledge of CADENCE layout tools.
Scripting skills in PERL or SKILL are a plus.
Capability to lead other layout engineers for top-level integration.
Minimum Qualifications
8+ year minimum related experience required
Good understanding of RC delay, electromigration, and coupling.
Ability to recognize failure-prone circuit and layout structures and proactively work with circuit designers for the best approach to resolve problems.
Excellent communication skills and ability to work with multi-functional teams.
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $43.07 and $76.64/hr, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Description
Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation and FW/SW engineering.
- Block level and top-level layout through full verification flow, including extraction, DRC, LVS, and DFM checking.
- Co-work with designers on block-level and top-level floorplanning.
- Layout review for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling.
- Top-level layout integration and verification, schedule management.","responsibilities":"As a RF layout engineer, you will be responsible for:
Detailed transistor-level layout of RF and analog circuit blocks, including LNA, mixers, PLL, LO generation, modulators, power amplifiers, ADC/DAC, baseband filters, and bandgap/bias/LDO.
Preferred Qualifications
Knowledgeable in layout techniques for device matching, minimizing parasitics, RF shielding, and high-frequency routing.
Experience in custom RF/analog layout for radio transceivers with extensive knowledge of deep sub-micron CMOS (16nm and lower with FinFet experience).
Solid understanding of RC delay, electromigration, and coupling.
Understanding of guard rings, DNW, PN junctions, and sophisticated process effects such as LOD, WPE, etc.
High level proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. in FinFet Technology.
Extensive knowledge of CADENCE layout tools.
Scripting skills in PERL or SKILL are a plus.
Capability to lead other layout engineers for top-level integration.
Minimum Qualifications
8+ year minimum related experience required
Good understanding of RC delay, electromigration, and coupling.
Ability to recognize failure-prone circuit and layout structures and proactively work with circuit designers for the best approach to resolve problems.
Excellent communication skills and ability to work with multi-functional teams.
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $43.07 and $76.64/hr, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Additional Information
- Salary: $43 – $77/hr
- Posted: 19 days ago