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Apple

SoC Digital Verification Engineer (m/f/d)

21 days ago• Munich, Germany

About us

Working at Apple means doing more than you ever thought possible and having more impact than you ever imagined.

★ 3.7 out of 5 · 120 reviews

  • Size: 10,000+ employees
  • Industry: Technology: Manufacturing
View company profile ›

Why you should apply for a job to Apple:

  • Ranked as one of the Best Technology Companies in 2020
  • 3.7/5 in overall job satisfaction
  • 3.1/5 in supportive management
  • 66% say women are treated fairly and equally to men
  • 65% would recommend this company to other women
  • 66% say the CEO supports gender diversity

Ratings are based on anonymous reviews by Fairygodboss members. See all reviews ›

Imagine yourself at the center of our SOC/chip DV effort. Where we are collaborating with all fields, playing a meaningful role of getting functional products to millions of customers quickly.

Description
As the SoC Verification Engineer, we are responsible for taking part in a SoC verification process of a large scale SoC. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it.","responsibilities":"As a member of the verification team you will develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors. You will apply sophisticated techniques to achieve verification with the highest quality, efficiency, and time-to-market You are going to work closely with the design team to ensure timely delivery of quality designs. You will also work with methods to accelerate verification time and will be involved in Post Silicon Validation.

Preferred Qualifications
Hands-on experiences in SoC verification.
Knowledge of SoC architecture/design and in-depth knowledge of verification flow.
Strong understanding and proven experience in the sophisticated verification process, including dynamic, coverage-based and formal methods.
Experience using some of the following: Perl, e, Verilog, System Verilog, C, C++, TCL.
Familiarity with verification environments e.g. UVM, System Verilog is an advantage.
Knowledge in formal, hardware acceleration is a plus.

Minimum Qualifications
You should have a BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or equivalent experience.
Ability to fluently speak & write in English.

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Additional Information

  • Posted: 21 days ago
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